Accelerate your 5G and NFV Workloads with Intel PAC and Netcope P4

Did you know, Netcope P4 supports Intel® FPGA PAC N3000?

Netcope P4 compiles the packet processing program written in open-standard P4 language into 100 Gbps FPGA firmware, allowing unprecedented flexibility and rapid development of high-speed network applications.

Netcope P4 Flyer 

It offers a revolutionary way for programmable network adapters to be easily programmed using P4 language without expert knowledge of hardware architecture, which can significantly save money when hiring dedicated firmware designers. It also shortens time-to-market, avoiding lengthy firmware development cycles.

Using the Arria 10 FPGA, now in mass production, Intel® FPGA PAC N3000 is the platform of choice for the acceleration of many bandwidth and latency-sensitive virtualised network applications, such as vRAN, vEPC, vBNG and others. Netcope P4 brings the possibilities for this card to a whole new level. Instead of tedious and error-prone HDL coding, the card can be programmed in the open-standard P4 language.

Netcope P4 is now specifically optimised to take advantage of the N3000 unique features, offering large capacities of lookups in off-chip DDR memories and achieving line-rate packet processing with low latency and resource utilization. With Netcope P4 and N3000, your fully custom 100 Gbps packet processor built with COTS hardware is just hours away.

Sarsen Technology is Netcope's UK partner. For more information on P4 or FPGA acceleration please contact us.

Watch Video - Intel® FPGA PAC N3000

How to Build 5G Networks - Netcope Technologies

Fifth-generation (5G) mobile networks are a significant topic in the acceleration of mobile networks.

Networks are gradually being upgraded with 5G equipment to replace existing 4G technologies. With this upgrade comes an expectation from users for a significant increase of network traffic data speed, but this creates a big challenge for operators... It's just not that easy to accelerate something twenty times!

Victor Puš, CTO Netcope Technologies, has written an easy to digest article about the specifics of building 5G networks.

Find out more about Netcope Technologies.


Article:

"Fifth generation mobile networks are a big theme of today. Users obviously hope for quicker data rates from 5G. There is a promise of up to 20 Gbps, which is about twenty times more than the theoretical speed of the current 4G networks.

On the other hand, telcos are scared of the costs of the upgrade of their networks. After all, to accelerate something twenty times is not that easy. At this point, public discussion is mostly led by new frequencies and about territorial coverage with the 5G signal. But equally, if not more difficult technical battle will be fought backstage, particularly about the aggregation of user traffic and its connection to the Internet from the telco network."

JOSCAR - Joint Supply Chain Accreditation Register

Sarsen Technology is very pleased to be a Stage 2 registered member of the Joint Supply Chain Accreditation Register (JOSCAR), which enables prime contractors in the aerospace, defence, space and security industries to identify pre-qualified suppliers for a wide range of products and services.

We have been a member of JOSCAR for five years now, and in that time the network of both suppliers and buyers has grown significantly.

View Certificate

JOSCAR membership is designed to improve efficiency of both the supplier and buyer communities by ensuring that companies only use products and solutions of the highest quality and that comply with best practices.

By providing a central system to hold approved suppliers information, JOSCAR enables information to be accessed by all participating buying organisations, thus saving costs, resources and time.

To maintain Stage 2 accreditation, Sarsen Technology is assessed annually across a wide range of business metrics including our policy on counterfeit materials, insurance, health and safety, environmental and sustainability, IT security, anti-bribery and corruption, product safety and quality.

Our JOSCAR accreditation assures our customers and and manufacturing partners that the service we provide is of the highest quality, and makes it easier for them to evaluate and incorporate our products into their applications. If you'd like more information please get in touch.



Current buying organisations subscribing to the system include:

• BAE Systems
• Babcock International
• QinetiQ
• NATS
• Leonardo UK
• MBDA
• Meggitt
• UK MOD
• General Dynamics UK Limited
• Rolls Royce Submarines
• Roke Manor Research
• Leidos UK

Zero Packet Loss Processing for Government Security Applications

Government market sectors like cyber security, intelligence, surveillance and secure communications have become increasingly important in recent times. They also come with a unique set of challenges when it comes to protection from criminal activity taking place across the internet.

These types of applications have to support the strictest security measures as well as aggressive data bandwidths. We work with Netcope Technologies to provide programmable hardware accelerators that guarantee wire-speed traffic processing with zero packet loss on 100G, 40G and 10G Ethernet.

In combination with ready-to-use firmware, these accelerators provide both per-packet and stateful filtering, which is a basic element of lawful interception and data retention systems.

Together with support for multiple network technologies(100G, 40G, 10G and 25G Ethernet), this protects future investments when moving to higher speeds. Specifically, Netcope Session Filter (NSF) implements smart pre-processing of network traffic, based on keeping track of network flows directly in hardware.

NSF surpasses competing solutions due to its ability to dynamically adjust the level of traffic details transferred to software. Smart cooperation between intelligent software and powerful hardware allows implementation of reliable interception systems for the highest-speed networks, which is not possible with conventional solutions.

For more information about how Netcope and Sarsen can support your Law Enforcement, Cyber Security or Intelligence applications please get in touch - info@sarsen.net

Unrivaled Processing Performance on Rugged, Deployable Intel Xeon D Processor Boards

Since announcing their first single board computers (SBCs) based on the Intel® Xeon® D-1500 family of processors in 2015, Extreme Engineering Solutions (X-ES) has been busy, developing an industry-leading portfolio of embedded Xeon D products that is still growing.

These embedded SBCs provide designers with feature-rich computing solutions that are equally at home in a broad range of industries and applications, from challenging industrial environments to rugged defence deployments.

Originally available with up to eight cores, the Xeon D processors from Intel are now available with support for 12 and 16 cores in a single processor. Integrated on X-ES VPX SBCs, these high-performance, low-power processors are ideally suited for a variety of applications and infrastructure, including routers, network appliances, and battlefield communications.

Xeon D is also the first Intel processor with native extended temperature support, a key requirement for many defence and aerospace applications. Xeon D processors with up to 12 cores are rated by the manufacturer for an operating temperature range of -40⁰C to 85⁰C.

Keeping pace with strong demand from the defence and aerospace sectors, X-ES continues to introduce new products and features to their Xeon® D lineup. Their talented design engineering team draws upon an impressive breadth of experience with this architecture to minimise risk for even the most challenging designs.

There are a number of configurations available, including 3U VPX, 6U VPX, and COM Express form factors. For more information please contact Christos or Nigel who can discuss your application with you in detail.

BittWare and nCk Research Collaborate to Provide an FPGA-based 100G Network Packet Broker with PCAP Filtering

As one of the market leading manufacturers in their field, new announcements from BittWare are always exciting...

The latest from the BittWare team in Concord, NH, is a collaboration with nCk Research - an innovative supplier of FPGA IP. This dream team have worked together to come up with a 100G network packet broker with PCAP filtering, which is implemented on BittWare's new PCIe board featuring Xilinx's UltraScale Virtex FPGA.

BittWare XUSP3S - Xilinx UltraScale 3/4-Length PCIe Board with Quad QSFP, DDR4, QDR-IV, and QDR-II+

PCAP processing expressions are used by many packet broker systems, but the point-to-point fabric from nCk Research is the first in the industry to optimise user inputs before loading resource settings into registers in the FPGA. This optimisation allows more rules to be packed into a smaller space and increases packet processing efficiency. The packet broker IP also provides configurable support for RMON1, line rate policies, aggregation, decimation, and de-duplication.

The XUSP3S is backward compatible with 10G/40G, and with nCk's IP supports up to 4x 100G ports and/or up to 16x 10/25G ports on each board. It can also be configured to implement any combination in between, allowing users to deploy with some 10G today and easily upgrade to all 100G in the field.


"We're pleased to be able to work with nCk to add innovative and comprehensive application IP to our already well established FPGA platforms," said Ron Huizen, Vice President of Systems & Solutions at BittWare.
"Their advanced filter IP component lets programmers use standard PCAP syntax to filter packets at full 100G line rate, and they can modify the filters on the fly- without having to reconfigure the FPGA. This, combined with nCk's other packet processing IP running on the most advanced FPGAs in the world, creates a compelling solution."


"FPGAs are the ideal choice for 100G at full line rate, and we're pleased to be able to partner with BittWare to build on their best-in-class FPGA platforms," said Matthew Chabot, President of nCk Research. "Their XUSP3S UltraScale board with support for quad 100G is a perfect fit."

Learn more:
10/25/40/100G Ethernet Filter IP Core for FPGA 
10/25/40/100G Packet Broker with PCAP Filtering 



Terabox
Up to 8 XUSP3S application cards can be installed in a BittWare TeraBox 4U rackmount system to handle up to 32x 100G ports and/or up to 128x 10/25G ports, allowing users to build virtually any packet processing solution with nCk network IP libraries; coupled with an optional PCIe DMA or NIC interface, it becomes possibly the most feature rich packet processing appliance in the industry.

Packet Broker with PCAP Filtering IP & Appliance Pricing and Availability
This configuration is available for purchase now, please contact Sarsen Technology for more information.

FIPS 140-2 and Common Criteria Certified Router Featuring Cisco IOS Technology

Author - Laura

Extreme Engineering Solutions (X-ES) is commited to providing high quality, cost-effective hardware and software solutions for the embedded systems market. Alongside their extensive range of high-performance single board computers (SBCs) and rugged, extended temperature systems X-ES provides a range of rugged routers running Cisco™ IOS® IP routing software.

Designed to meet the needs of the most demanding and Size, Weight, and Power (SWaP) constrained mobile and embedded networking applications each router supports four routed, high-speed Gigabit Ethernet interfaces, enabling the routers to serve as an aggregation point for on-demand network connectivity in mobile or fixed deployments. The X-ES routers extend the Cisco enterprise infrastructure beyond the reach of traditional fixed-network infrastructure for military, oil and gas, mining, smart grid, heavy construction, transportation, homeland security, public safety, and disaster recovery applications.

• XPedite5205 Embedded Services Router (ESR) - a PMC/XMC-based router
• XPand6004 - a rugged packaged router in a Small Form Factor (SFF) enclosure
• Cisco 5940 - a 3U CompactPCI router

On September 10th, 2014 the National Institute of Standards and Technology (NIST) Cryptographic Module Validation Program issued Certificate #2242 for the X-ES XPedite5205 XMC/PMC Cisco IOS® Embedded Services Router (ESR). The XPedite5205 has been validated to FIPS 140-2 Overall Level 1 by an NVLAP-accredited Cryptographic Module Testing (CMT) laboratory. Additionally, this ESR has been validated to Roles, Services, and Authentication Level 2, and Design Assurance Level 3.

On November 17th, 2014 the National Information Assurance Partnership issued the Common Criteria Certificate for the XPedite5205 XMC/PMC Cisco IOS® Embedded Services Router (ESR) for completion of the evaluation in accordance with the Common Criteria Evaluation and Validation Scheme (CCEVS). The XPedite5205 satisfies the Assurance Activities criteria as defined within the Common Criteria (CC) Protection Profile for Network Devices, Version 1.1 and Protection Profile for Network Devices VPN Gateway Extended Package, Version 1.1.

For more information please contact Sarsen Technology on +44 1672 511166 or send us an email with your enquiry - info@sarsen.net

Free Aerospace/Avionics Control and Monitoring Systems Webinar Next Week!

 Author - Laura Biddiscombe

Join United Electronic Industries for their
"Control & Monitoring Systems for Aerospace Applications" Webinar!

Wednesday, February 11 from 7-8pm GMT.

What You'll Learn

• How to strengthen the performance of your avionics test and simulation applications
• How high channel density modules, along with AVIONICS bus support, can help you develop a distributed and modular networked architecture that produces results in a “close to the action” environment
• How our hardware, software, and support can help you find the best possible solution.

 

UEI's data acquisition and control products are rugged, reliable, and extensible systems that can be used in a variety of applications. Backed by a 10-year Availability Guarantee, UEI's systems use a variety of modes, operating systems, languages, and interfaces to adapt to how you work.

UEI supports all popular Windows, Vista, Linux and Real-time operating systems and programming languages. We also offer complete and seamless support of all major application packages, including LabVIEW, MATLAB and DASYLab.

FIND OUT MORE ABOUT UNITED ELECTRONIC INDUSTRIES

BittWare partners with Tamba Networks to provide ethernet MAC+PCS IP cores

BittWare, the provider of Altera-based FPGA COTS boards, has entered into a Value-Added Reseller (VAR) agreement with Tamba Networks, a developer of low-latency, high-speed Intellectual Property (IP) cores for networking and financial applications.

The Tamba Networks 1 to 400 Gigabit Universal Ethernet IP Core is a low latency and gate count solution which enables a 10 GigE "FIFO+MAC+PCS" of approximately 25 ns in an Altera Stratix V FPGA. This decreases the round-trip delay wire-to-wire. By narrowing their focus to the ethernet MAC and PCS - designing their own soft PCS core as opposed to the typical solution which uses the hard PCS core - Tamba Networks has optimised the design of both, bringing an extremely efficient solution to market and saving many nanoseconds of latency in the process.

“Many of our customers are looking for the lowest possible latency,” stated Ron Huizen, Vice President of Systems & Solutions at BittWare. “Therefore, we are always seeking out industry-leading technology that can help. Tamba’s MAC+PCS IP cores enable us to provide our customers with unprecedented wire-to-application ethernet latency.”

The Tamba Networks IP cores are available today on all of BittWare’s PCIe-based Altera Stratix V family of boards which include the following:
S5PE-DS Dual Altera Stratix V GX/GS PCIe Board with Quad QSFP+, DDR3, QDRII+, and RLDRAM3
S5PH-Q Altera Stratix V GX/GS Half-Length PCIe Board with Dual QSFP+/SFP+, DDR3, and QDRII+
S5PE-F Altera Stratix V GX/GS PCI Board with VITA 57 FMC Site
S5PE Altera Stratix V GX/GS PCI Board with Dual QSFP+

For more information please contact Sarsen Technology on +44 1672 511166 or email the team - info@sarsen.net

International Space Station Video System Upgrade Leverages Multicore SBC Technology from Trenton Systems

Following the United Electronic Industries' Cube-controlled COLBERT astronaut treadmill up to the International Space Station, Trenton Systems hardware has been selected for a critical upgrade to it's Microgravity Sciences Glovebox NTSC analog video system.

The upcoming Microgravity Sciences Glovebox (MSG) Video Upgrade Equipment (VUE) from Teledyne Brown Engineering uses the TSB7053 single board computer and BPG7087 backplane from Trenton Systems, providing embedded multicore Intel processor technology incorporated into a PICMG 1.3 single board computer (SBC) architecture.

The new VUE is a digital upgrade that removes the need for tapes and the associated problems with transporting the physical media between Earth and the station. The upgrade to digital data means transmission to the ground can be made by telemetry networks, allowing to the ground science teams to access the data much more quickly, and start their analysis within days of any MSG experiment, rather than the multi-month wait time typical with the current analog tape system.

MSG-VUE Video Drawer Front Panel

There are a number of reasons that Teledyne Brown Engineering of Huntsville, AL choose to integrate a Trenton Systems long-life SBC and PCI Express backplane into the MSG VUE video drawer for controlling key elements of the microgravity test chamber:

• Longevity: Computer equipment deployed on the ISS must remain operational as long as possible
• Flexibility: The ability to support different types of PCI Express plug-in cards is extremely important
• Scalability: The ability to quickly add custom or standard COTS plug-in cards is a distinct advantage
• Bandwidth: PCI Express bandwidth and data throughput capabilities are critical in the MSG VUE

Ground tests are nearly complete on key mission parameters like radiation exposure and data operations, and the MSG VUE will be handed over to NASA for a planned deployment on the ISS in mid-2014. The computer, camera, sensor and monitor technologies deployed in the VUE will provide years of operational support for the advanced science experiments conducted on the International Space Station.

For more information you can read the complete article here - ISS Video System Upgrade Leverages Multicore SBC Technology

BittWare's Anemone - A New Approach to Floating Point DSP

Ah-ne-MO-nee
It’s a word that is quite often mis-pronounced.
It’s not Ane-No-Me. Or worse – An-En-ema. Definitely not that!

BittWare’s first generation Anemone chip, the Anemone104 (AN104) is a completely scalable multicore processor with 16 eCores that provide a total sustained performance of 19.2 GFLOPS while consuming only 1 Watt of core power.

Featuring the Epiphany architecture from Adapteva, the BittWare Anemone combines the best assets of both FPGA and floating point DSP technology, thereby offering a completely new approach to floating point digital signal processing. The FPGA handles all the memory, I/O interfacing, protocol processing, and special functions, in addition to any computational tasks it may perform. This leaves the Anemone free to perform the complex processing tasks that DSPs are ideal for.

The AN104 features an internal high-throughput mesh network, with separate data paths for on-chip and off-chip communications. Total on-chip, inter-core bandwidth is 76.8 GBytes/sec full duplex, with an additional 8 GBytes/sec of off-chip bandwidth.

The BittWare Anemone Evaluation Kit provides a cost-effective way to begin evaluating the Anemone co-processor for FPGAs, featuring an Anemone104 and Altera Stratix III FPGA based evaluation board - ready to use out of the box, with the Ubuntu Linux OS and Anemone development tools installed on an included laptop.

This is pretty new technology – if you would like more information give the Sarsen sales team a call on +44 1672 511166 or send us an email.

Super Speed HFT with BittWare FPGA PCIe boards

High Frequency Trading is made even faster with FPGA Solutions from BittWare!

In layman’s terms, high-frequency trading (also known as HFT) is the buying and selling of stocks at super fast speeds, with the help of very powerful computers. Using complex algorithms, these computers can scan dozens of public and private marketplaces at the same time and execute millions of orders a second.

High-frequency trading is highly dependent on ultra-low latency as well as ever-faster analysis/data correlation. The products used also need to achieve maximum performance per watt to minimize energy and thermal requirements. BittWare offers a range of FPGA-based PCIe COTS solutions to address the challenges of developing financial applications.

BittWare’s Stratix V PCIe cards offer the industry’s highest performance FPGA for network and algorithm acceleration. These boards provide the ultimate in low latency with high performance FPGA transceivers (no external PHY) and optional TCP/IP offload engine. With maximum processing performance per watt to minimize energy and thermal requirements and QDR II/II+ combined with 10GigE straight to the FPGA (no conversion to XAUI) for ultra-low latency, BittWare’s PCIe boards are ideal for applications in the High Frequency Trading (HFT) market.

Fixnetix, global managed services provider for trading, market data and risk control, were the first fintech (financial technology) company in Europe to offer the Altera Stratix V FPGA on the BittWare PCI Express slot-cards. The Altera Stratix V FPGA with integrated 10GigE and BittWare PCIe Gen 3 slot card is ideal for iX-eCute, the Fixnetix FPGA firmware for nanosecond trading and pre-trade risk checks across multiple asset classes. BittWare PCI Express slot-cards are the hardware boards that iX-eCute operates on whilst Altera Stratix is the industry's highest performance FPGA with over 1 TeraFLOPS of processing.

If you would like more information about how the BittWare hardware could work in your application please give us a call on +44 1672 511166, or drop us an email!