NMI FPGA Network: Design Tools and Methodologies - 11th October 2016

The National Microelectronics Institute (NMI) was created to increase the quality and quantity of electronic engineering and manufacturing in the UK.

NMI provides:

• A focal point for this industry; connecting industry, academia and stakeholders to build a strong eco-system
• A mechanism to work together to address common challenges in engineering and manufacturing sharing domain knowledge and know-how across vertical applications
• Opportunities to raise your profile and develop your business through new partnership and programs addressing business opportunities
• This industry with a voice by building industrial coherence on the strategic issues and opportunities; seeking to inform government and its agencies; supporting their decision-making processes
• A response to your individual business needs

NMI Infographic – Click to view full size

FPGA Network – Design Tools & Methodologies

On October 11th the NMI is hosting an event in Swindon which will allow members to share experiences of how FPGA design tools and methodologies impact build schedules, solve difficult problems, affect quality, optimise architecture and bridge hardware and software communities.

This event is ideal for you if you are an architect, designer, verification specialist, project manager or engineering manager and you care about tools and methodologies to help do a better job of creating FPGA designs or systems based on FPGAs.

Confirmed Speakers:

Synopsys: Flexible debug and visibility techniques to enhance all FPGA design and deployment cycles  
Mentor Graphics: Staying competitive by evolving your FPGA verification methodologies
Cadence: 100M gate designs in FPGAs – Fact or Fiction?  
BittWare: FPGA Platform Development Kit Enables Fast TTM  
Telexsus: FPGA real-time debug with vastly increased operational capture time – live demo  
Altera (now part of Intel): Zen and the art of high speed design

We have 5 free tickets for this event. If you'd like to join us please contact Sarsen Technology to register your interest - info@sarsen.net

What exactly is High Speed Financial Trading?

It's 'Financial February' here at Sarsen, so we thought it was a good idea to describe exactly what Financial Trading is, specifically the High Speed Financial Trading that we've been focussing on over the last few weeks.

In layman’s terms, it’s the use of very powerful computers programmed with sophisticated instructions to trade stocks and make profits from minute price variations that occur in less than a second.

Simples!

High Speed Financial Trading, or High Frequency Trading (HFT) doesn’t actually have anything to do with ‘investing’ as we know it, it’s simply a set of computing instructions that react to information much faster than any human can. These trades can make significantly less than 1p per share, but if you add up the millions of trades per day you’re looking at a respectable chunk of money!

‘Pretty complex stuff’, I hear you say...

Fortunately BittWare has designed and developed a growing family of PCIe format Altera Stratix V FPGA hardware which makes it easier for customers to create system solutions for financial acceleration.

The challenges in this space are quite unique:

• Require ultra-low latency feed handling
• Faster analysis/data correlation
• Maximum performance/watt (minimize energy and thermal requirements)
• Desire for scalable architecture to enable “FPGA Farm” implementation

‘Low-Latency’ is the real buzz word for HFT, with the solution offering the lowest latency being the most attractive to prospective customers.

The BittWare S5-PCIe-HQ half-length PCIe board, which features the Altera Stratix V FPGA, provides systems developers with a high level of system integration, and high-performance network processing, signal processing, and data acquisition possibilities.

For more information get in touch with the Sarsen team on +44 1672 511166, or email us – info@sarsen.net

BittWare's Anemone - A New Approach to Floating Point DSP

Ah-ne-MO-nee
It’s a word that is quite often mis-pronounced.
It’s not Ane-No-Me. Or worse – An-En-ema. Definitely not that!

BittWare’s first generation Anemone chip, the Anemone104 (AN104) is a completely scalable multicore processor with 16 eCores that provide a total sustained performance of 19.2 GFLOPS while consuming only 1 Watt of core power.

Featuring the Epiphany architecture from Adapteva, the BittWare Anemone combines the best assets of both FPGA and floating point DSP technology, thereby offering a completely new approach to floating point digital signal processing. The FPGA handles all the memory, I/O interfacing, protocol processing, and special functions, in addition to any computational tasks it may perform. This leaves the Anemone free to perform the complex processing tasks that DSPs are ideal for.

The AN104 features an internal high-throughput mesh network, with separate data paths for on-chip and off-chip communications. Total on-chip, inter-core bandwidth is 76.8 GBytes/sec full duplex, with an additional 8 GBytes/sec of off-chip bandwidth.

The BittWare Anemone Evaluation Kit provides a cost-effective way to begin evaluating the Anemone co-processor for FPGAs, featuring an Anemone104 and Altera Stratix III FPGA based evaluation board - ready to use out of the box, with the Ubuntu Linux OS and Anemone development tools installed on an included laptop.

This is pretty new technology – if you would like more information give the Sarsen sales team a call on +44 1672 511166 or send us an email.

High Frequency Trading speak to CEO Jeff Milrod about BittWare's FPGA development for the Low-Latency Financial Market

High performance computing using FPGA technology is a key technology for the financial services industry. High frequency automated financial trading uses models and simulations to provide real-time assistance in decision making. 

BittWare has designed and developed a family of PCIe format Altera Stratix V FPGA hardware optimised for this market. BittWare CEO Jeff Milrod has been speaking to High Frequency Traders about how this technology has made the low-latency financial market very excited.....

HFT: BittWare has been in business for quite a while, but you’ve only got into the financial space comparatively recently. How did this come about?

Jeff Milrod: "We’ve been producing commercial off-the-shelf signal processing boards and high performance computing boards since 1989 and they’ve been used in a wide variety of markets over the years.

Military is big component of our business as are wireless telecommunications, high-end instrumentation and medical imaging. More recently, we’ve actually had the finance market come to us. In the last couple of years it has decided that FPGAs are very attractive platforms for reducing the latency and increasing the performance of a lot of their applications. It just so happens that we have some of the best FPGA boards in the world. We were approached by financial market customers who thought our engines could work very well for them, so we’ve been working hard to learn more about the market and to figure out how to modify our boards slightly and add additional IP to create better solutions for the finance space.

One thing that’s unique about what we do, particularly compared to some of our competitors in the finance market, is that we consider ourselves a horizontal enabling technology. It’s expressed in our slogan ‘Essential building blocks…Innovative solutions.’ We want to provide building blocks for our customers and allow them to add the unique vertical application-specific value themselves. We don’t believe that’s our role. There’s a commonality across all markets for the underlying processing engines – be they implemented with signal processors or FPGAs – with relation to high speed data movement, power conditioning and control, thermal management and obsolescence management for deployed world class system solutions."

The full interview can be found here - High Frequency Traders.

Please give us a call on +44 1672 511166 if you would like any more information!

Altera Stratix® V GX/GS PCIe Board with VITA 57 FMC I/O Site or Dual QSFP+. Copyright BittWare.

BittWare to Exhibit at SIFMA 2012

June 19-20, 2012         Hilton New York

The Securities Industry and Financial Markets Association (SIFMA) Tech Expo draws the top technology exhibitors providing services to the financial services industry. It brings together the shared interests of hundreds of securities firms, banks and asset managers. These companies are engaged in communities across the country to raise capital for businesses, promote job creation and lead economic growth.

BittWare has designed and developed a family of PCIe format Altera Stratix V FPGA hardware optimised for the financial trading market.  Ron Huizen, Darren Taylor and Chad Hamilton from BittWare will be exhibiting at SIFMA next week on booth #1823, showcasing their (growing) Stratix V family of PCIe cards.  

More than 70 senior regulators and industry experts will participate in 29 educational sessions on the foremost issues facing financial technologists, and the event is expected to bring together more than 4,000 industry-leading professionals to discover the latest trends and solutions.

If you would like to visit BittWare at the SIFMA Tech Expo please give us a call on +44 1672 511166 to arrange a time.

Please contact Sarsen Technology for full details of the full range of PCIe format Altera Stratix V FPGA hardware and software developed for this market. E - info@sarsen.net 

http://www.sarsen.net/dept/financial-trading_d0145.htm

Altera's 28-nm Variable-Precision DSP Block Architecture Wins the 2011 DesignVision Award

San Jose, Calif., February 2, 2011—Altera Corporation (NASDAQ: ALTR) today announced that its variable-precision digital signal processing (DSP) block architecture won the DesignCon 2011 DesignVision Award in the Semiconductor and IC category. Altera's variable-precision DSP block architecture was recognized by DesignVision Award judges for its ability to enable high-precision, high-performance digital signal processing in FPGAs that efficiently supports many different precision levels. This unique architecture is implemented within Altera's portfolio of 28-nm FPGAs to increase system performance, reduce power consumption and reduce architecture constraints for DSP algorithm designers. Altera was presented with the 2011 DesignVision Award at a ceremony held at the Santa Clara Convention Center during DesignCon 2011.

Altera developed the industry's first variable-precision DSP block architecture to meet the industry's demands for higher precision signal processing. This innovative architecture allows each DSP block in the FPGA to be configured at compile time to three 9x9, two 18x18 or a single 27x27 or 18x36 multiplier mode. Additional higher precision modes are available using multiple DSP blocks. This architecture supports, on a block-by-block basis, various precisions per block, ranging from low resolution fixed point video up to single-precision floating point within a single DSP block, and even double-precision floating point with minimal external logic. To learn more about Altera's variable-precision DSP block architecture, or to view a white paper or webcast on the architecture, visit www.altera.com/dsp-variable-precision.