BittWare Releases Latest Version of BittWorks and OpenCL BSP for Arria 10 FPGA Boards

BittWare offers a complete range of FPGA boards designed to meet your needs. Their Arria 10 FPGA boards feature Intel’s high-end FPGAs to provide superior development productivity and unmatched performance. The latest boards feature PCIe x8 and x16 interfaces.

A10PL4	A10SA4
Intel Arria 10 GT/GX FPGA Low Profile PCIe Board with Dual QSFP and DDR4	Arria 10 GX Low Profile PCIe Board with QSFP and DDR4 on BittWare 'Spider' Thermal Platform
Datasheet	Datasheet

BittWare has put two decades of product design experience into creating a mature and robust suite of development tools that is tightly integrated with its FPGA products. These tools for system development and FPGA development shorten our customers’ learning curve while increasing their productivity, allowing them to reduce development costs and shorten their time to market.

OpenCL Bundle	BittWorks II Toolkit
BittWare’s OpenCL Developer’s Bundle provides the tools necessary to begin developing applications for the Altera Arria 10 or Stratix V using OpenCL. Open-CL dramatically simplifies FPGA development by enabling designers to code their systems and algorithms in a high-level C-based framework, directly generating FPGA programming files from a pure software development flow.	The BittWorks II Toolkit is a suite of development tools for BittWare’s FPGA-based hardware that serves as the main interface between the BittWare board and the host system. The Toolkit includes drivers, libraries, utilities, and example projects for accessing, integrating, and developing applications for the BittWare board.

• OpenCL BSP for Quartus 17.1.1 is now available for the A10PL4 and A10SA4. An updated Hello World example is also available for each board.

• Version 2018.1 of the BittWorks II Toolkit is now available. This is the first toolkit release of 2018. Software releases are numbered as the N'th release of the year. Software releases do not align with FPGA development environment software releases. This is a minor release. We recommend that you upgrade if you are using the Ubuntu operating system.

•  Release highlights: 

• Support for 4.10 kernel added for Ubuntu 16.04
• Fixed Ubuntu toolkit services
• Add missing BwShell functions

Please contact Sarsen Technology for more information.

White Paper - Intel Stratix 10 MX Devices Solve the Memory Bandwidth Challenge

White Paper

Intel® Stratix® 10 MX Devices Solve the Memory Bandwidth Challenge

Intel has put together a new White Paper to explain how the brand new Intel Stratix 10 MX family will help customers efficiently meet their most demanding memory bandwidth requirements.

"Conventional memory solutions have limitations that make it difficult for them to meet next-generation memory bandwidth requirements. This white paper describes the emerging memory landscape that addresses these limitations.

The Intel® Stratix® 10 MX (formerly Altera® Stratix 10 MX) DRAM system-in-package (SiP) family combines a 1 GHz high-performance monolithic FPGA fabric, state-of-the-art Intel Embedded Multi-die Interconnect Bridge (EMIB) technology, and High Bandwidth Memory 2 (HBM2), all in a single package. The Intel Stratix 10 MX family helps customers efficiently meet their most demanding memory bandwidth requirements, which are not possible using conventional memory solutions.

This white paper describes the solution and explains how Intel Stratix 10 MX devices solve the memory bandwidth challenge for key end markets and applications."


Authors
Manish Deo
Senior Product Marketing Manager
Intel Programmable Solutions Group

Jeffrey Schulz
In-Package I/O Implementation Lead
Intel Programmable Solutions Group

Lance Brown
Senior Strategic and
Technical Marketing Manager
Intel Programmable Solutions Group

© 2017 Intel Corporation. All rights reserved.

Swindon FPGA Meetup - 18th July 2017

Swindon FPGA Meetup Group

The aim of the Swindon FPGA Meetup is to provide a forum where people based in the Swindon area who have an active interest in Field Programmable Gate Array (FPGA) technology can get together to discuss industry developments in hardware & software tools, verification, architectures, simulation, verification and test.

We aim to connect local Engineers and Technologists who are working in the electronics industry and using FPGAs in their projects and applications. Rather than selling solutions, we want to share our industry knowledge and experience to further our collective technical expertise.

The first meetup is scheduled for Tuesday, July 18th at The Plough on the Hill near Swindon, and the organisers will provide food and a beer.

If there are any topics you would like to discuss please join the Swindon FPGA Group on Meetup.

Swindon FPGA Meetup Group - Event Details

Please get in touch for more information. We look forward to seeing you there!

BittWorks II Toolkit - Is it Even Necessary for my FPGA Development?

What is a Software Toolkit? 
Putting it simply, a software development toolkit is a set of tools that provides an interface between a hardware platform and a host system. Toolkits are critical if you want fast time to market. This is especially important for BittWare customers...

Why do I Need One?
BittWare has leveraged years of experience to provide a solid base for developers to make a start on their application, and the Toolkit has been an integral part of existing customer's success. They have been able to see first hand the value of the BittWorks tools, because they are so critical in getting projects up and running quickly. This software allows BittWare to properly support our customers.

More: BittWorks Toolkit

The BittWorks II Toolkit is a suite of development tools for BittWare’s FPGA-based hardware. The Toolkit includes drivers, libraries, utilities, and example projects for accessing, integrating, and developing applications for the BittWare board. Utilities and drivers connect the board to the host via PCIe, USB, Ethernet, or serial port, and provide easy access to the board’s system monitoring features and Flash programming.

Extensive libraries provide a consistent, intuitive API for integrating the board into the system and example projects illustrate data movement and provide a starting point for development. The Toolkit supports 64-bit Windows and Linux platforms and is tightly integrated with BittWare’s FPGA Development Kit (FDK), which provides FPGA board support IP and integration for BittWare’s FPGA-based boards.

The Nerdy Stuff
The BittWorks II datasheet is a great tool and clearly outlines what is provided and how it can help you get your application up and running quickly.

View Datasheet

Do I Need To Pay For It?
Well, yes. But BittWare doesn't currently charge for support (unlike some of the other board manufacturers in this market space) and this is only possible because of the development tools available. If a developer has the BittWorks Toolkit BittWare are able to provide the utilities they need to use the board as well as provide known working examples for the customers to leverage.

Toolkit licenses are handled per project/per location.  For a single project at one location there is a maximum of 3 licenses to be purchased. This means is that if there are 10 developers working on Project X you only need to buy 3 licenses.

Tell Me More...
If you'd like more information on how the BittWorks Toolkit and FDK can help speed up your development on both Intel (Altera) and Xilinx FPGA based hardware please get in touch with one of our specialists: info@sarsen.net

PCIe Board with Intel (Altera) Arria 10 GX FPGA Machine Learning Demonstration

BittWare took part in Super Computing 2016 last week, and used the event to showcase their must-see FPGA demos in network packet processing (NPP) and high-performance computing (HPC). If you were at the show you will also have seen BittWare's wide range of the latest Intel (formerly Altera) and Xilinx FPGA-based boards on display.



One of the demonstrations featured BittWare’s A10PL4 board, using Intel’s deep learning IP core loaded on the Arria 10 FPGA.

The A10PL4 from BittWare is an Altera Arria 10 FPGA PCIe board offering plenty of high speed serial I/O interfaces and debug support. Two QSFP cages are available, both connected to the Arria 10 FPGA removing latency in the external PHYs. The A10PL4 supports up to 32GB of DDR4 as well as flash memory with factory default and support for multiple FPGA images.

Find out more - A10PL4

 

Machine Learning

'Machine Learning' is based on the development of computer programs that can learn and create their own rules. In deep learning, a task can be learned by the machine from a vast amount of data, either in supervised or unsupervised manner.

With the Deep Learning IP customers can leverage Intel Caffe in the Data Analytics Acceleration Library (DAAL) and Intel MKL-DNN to build AlexNet- or GoogleNet-like topologies without requiring a recompilation of the FPGA.

Accelerating machine learning applications like these are an excellent fit for FPGAs and OpenCL. Up to 16 A10PL4s can be combined inside a 4U server for a total of 18M logic elements and 512 GBytes of DDR4 memory.

Find out more - Terabox

For more information please speak to one of our FPGA specialists - +44 1672 511166 or send us an email - info@sarsen.net 

www.sarsen.net

Join us at the next FPGA Network meet-up on Tuesday 11th October in Swindon!

FPGA experts who care about tools and methodologies can’t afford to miss the next meeting of the NMI FPGA Network... You will find this meeting especially compelling if you are an architect, designer, verification specialist, project manager or engineering manager.

We know how important design tools and methodologies are in creating better FPGA designs and FPGA systems-based, this is why we are excited to be sponsoring this event and would be delighted to see you there too!

On the day we will contribute to the debate with a discussion on ‘FPGA Platform Development Kit Enables Fast TTM’ delivered by Chad Hamilton, VP of Intellectual Property (IP), Software and Support at BittWare.

Chad will join the discussion along with FPGA specialists from other Industry leaders.

Confirmed Speakers 
Synopsys: Flexible debug and visibility techniques to enhance all FPGA design and deployment cycles
BittWare: FPGA platform development kit enables fast TTM
Mentor Graphics: Staying competitive by evolving your FPGAverification methodologies
Bitvis AS: A game changer for VHDL verification: advanced VHDL verification – made simple for anyone
Telexsus: FPGA real-time debug with vastly increased operational capture time – live demo
Cadence: 100M gate designs in FPGAs – fact or fiction?
Altera now part of Intel: Zen and the art of high-speed design
Xilinx: Vivado HLx Design Methodology
ITDev: Static code analysis using Blue Pearl software

See full details (pdf)

We are also very pleased to have Manuele Papais from DAVE Embedded Systems with us, showcasing their Xilinx Zynq based hardware and talking to engineers about Asymmetric Multi Processing on Cortex-A CPU: system integrity and reliability on Linux and RTOS cores.

Find out more and book your place here.

We look forward to seeing you at the FPGA Network Event ‘Design Tools and Methodologies’!

BittWare Releases Arria 10 OpenCL BSPs for Altera OpenCL SDK 16.0.2 Release

BittWare has recently announced the availability of Arria 10 FPGA Board Support Packages (BSPs) for Altera's recently released OpenCL SDK 16.0.2, including support for production silicon.

See full press release

BittWare’s OpenCL BSPs allow customers to develop applications for the Altera Arria 10 1150GX FPGA using OpenCL quickly and easily. OpenCL makes FPGA development much simpler by enabling designers to code their systems and algorithms in a high-level C-based framework, directly generating FPGA programming files from a pure software development flow.

FPGAs can dramtically improve speed and increase responsiveness for many system designs, in markets as diverse as defense/aerospace, fintech and life sciences. BittWare offers BSP variants to support High Performance Computing (HPC) as well as Network Processing applications.


"We've worked closely with Altera to ensure that our OpenCL BSPs provide the best quality results possible," said Chad Hamilton, BittWare VP of IP, Software & Support. "For those customers who prefer to code in a C-based framework, our OpenCL BSPs provide the tools necessary to get them up and running quickly and efficiently."

OpenCL Developers Bundle
The BittWare OpenCL BSPs are included in the OpenCL Developer’s Bundle, which includes a BittWare Arria 10 or Stratix V PCIe board, the BittWorks II system development software, the Altera Quartus II soft­ware, and the Altera SDK for OpenCL. This competitvely priced development bundle gives developers access to the latest generation of high-performance FPGAs on a validated PCIe board, while also significantly reducing their time ­to market by using OpenCL to develop their application.

Benefits of OpenCL for FPGAs

• Faster time-to-market using the OpenCL C-based parallel programming language as opposed to low-level hardware description language (HDL)
• Quick design exploration by working at a higher level of design abstraction
• Easy design re-use by re-targeting existing OpenCL C code to current and future FPGAs
• Faster design completion by generating an FPGA implementation of OpenCL C code in a single step, bypassing the manual timing closure efforts and implementation of communication interfaces between the FPGA, host, and external memories.
• Increased performance by offloading performance- intensive functions from the host processor to the FPGA
• Significantly lower power than a GPU or multicore CPU by using the Altera SDK for OpenCL, which generates only the logic needed

EE Journal Feature Article - The x86 Moat: Can Intel Defend the Data Center?

A Data Centre is a dedicated space for housing computer systems and associated components,

including telecoms and storage systems. Data centres stem from the days of the huge computer rooms of the early ages of the computing industry. This arrangement was largely unaffected by the steady reduction in size of the computer as the functionality requirements increased to such an extent that the systems still required the same amount of space. 

During the 1990s, the challenge was deploying enough processing power to meet the rapidly growing web audience. Considering Intel's market share for this industry today, x86-based servers didn't actually exist until the late 90s. But within a decade x86 processors were in the majority of servers being deployed in data centres.


Kevin Morris has written a really interesting article for EE Journal, looking at the role of FPGAs and their potential impact on the EDA industry.


May 31, 2016
The x86 Moat - Can Intel Defend the Data Center?
By Kevin Morris

Read the full article 

Excerpt:

Intel’s data center fortress is defended by the x86 moat.

The single factor that most locks Intel’s hardware into the sockets that sit on the blades that slip into the racks that line the rows of just about every data center on the planet is the x86 moat. Just about every piece of software in the universe was written and optimised for the x86 architecture. There are billions and billions of lines of code out there working every day that have been debugged and tested and proven to work reliably (well, as reliably as software gets, anyway) on Intel’s architecture.

Before any attacker can hope to displace the incumbent supplier, they have to convince the customer that changing processor architectures is really not that big a deal.

Well-designed fortresses are very good at protecting against the expected. For the fortress to be truly at risk - for Intel’s position in the data center to be realistically challenged in a meaningful way - we would need to see a sea change - an event that profoundly alters the nature of the game - a discontinuity.

FPGA-based acceleration is that discontinuity.

If the creation of heterogeneous processors with von Neumann machines sharing the workload with FPGA-based accelerators can improve energy efficiency in the data center by orders of magnitude, we have a compelling event worth an incredible amount of money - and trouble.

End of excerpt


FPGA Hardware
Sarsen Technology supplies and supports a wide range of hardware based on both Xilinx and Altera FPGAs, and can also supply a full range of software development tools and software drivers to get your FPGA system to market on-time and on-budget - www.sarsen.net
For more information please contact Sarsen Technology on +44 1672 511166, or send us an email: info@sarsen.net

NMI FPGA Network: Safety, Certification & Security Event - 19th May 2016

Date:	May 19 @ 9:00 am - 4:00 pm
Event:	FPGA Network: Safety, Certification & Security
Venue:	Room A166 and Room A161, Lindop Building, University of Hertfordshire, College Lane Campus - College Lane, Hatfield AL10 9AB

Programmable devices are one of the most important platforms for electronic system design. In the last few years FPGA devices have become increasingly sophisticated and capable, allowing them to sit at the heart of a wide range of product and system designs. This trend is set to continue into even greater volume markets as performance improves even more.

Because of their extensive market appeal the emphasis on safety, security and regulation through certification for FPGA based designs has become more important than ever. This event will explore technology issues implementing FPGA based systems where safety and security are prime considerations and when standards based certification must be met.

NMI’s network meetups assemble a melting pot of engineers from different sectors to share experience and latest experience. The aim is to educate and enthral and to return to the work place with ideas, solutions and knowledge. The content of the meeting will be geared for a technical audience with ample time for discussion and networking.

Confirmed speakers include:

Would you like to speak? There a few open slots and NMI invites you to propose a topic.
It’s a great way to connect with the industry and to show case the cool stuff your company does.

For more information please contact Pete Davy – 07979 706 357.


About NMI

www.nmi.org

NMI is the Champion for the UK Electronic Systems & Technology Industry. Their mission is to help make the UK a leading location for electronic systems and technology businesses.They aim to support their members’ short-term priorities and the industry’s long-term needs. NMI's work covers innovation, operational excellence, investment, the skills agenda, advocacy and representation.

NMI Event - “Managing FPGA Projects: A Cat-herders Guide” - November 25th 2015

Sarsen Technology is taking part in the “Managing FPGA Projects: A Cat-herders Guide” event next week, organised by NMI.

About NMI



Agenda items include:

“Leveraging ASIC and Software methodologies for FPGA design” – Leon Wildman – Aptcore

“Managing complexity: version control basics for FPGA projects” – Sven-Erik Knop – Perforce

“Teaching an old dog new tricks – The opportunities and resulting challenges of getting consumer silicon into safety critical systems” – Mike Allen, Jon Wright – GE Avionics

“Management sans frontiers: Removing the roadblocks in FPGA projects” – Chris Higgs – Potential Ventures

“Optimizing the HW/SW partition of complex embedded systems” – Simon George – Xilinx

“Inspiring the next generation of FPGA engineers: Skills management in the long term” – Jeremy Bennett – Embecosm

“Requirement driven development for safety-critical applications” – Alex Grove – FirstEDA/Aldec

“Applying Agile Techniques to FPGA Projects” – Nigel Elliott – Mentor Graphics

. . . plus an open discussion to share hints and best practices.

Sarsen will be showcasing Altera and Xilinx FPGA-based hardware from BittWare, Extreme Engineering and DAVE Embedded Systems, as well as C to FPGA software for Xilinx and Altera FPGAs from Impulse Accelerated.

REGISTER NOW

Registration is now open, so please join us to learn some new tips, tricks and “agile” methods that teams are using in order to keep on top of ever-more complex FPGA designs.

Industry Article - How to evolve a risk-based FPGA strategy into a value add strategy

Fixnetix is a leading managed service provider for the global financial community, with a team of highly skilled professionals tasked with developing and providing dynamic products and solutions to meet the ever changing requirements of the banking industry.

Dr Marcus Perrett, Director of Technology and Development, provides an insight into the use of FPGA technology in the finance industry.

How Fixnetix has evolved their risk-based FPGA strategy into a value add strategy 

The use of FPGAs in finance was originally driven by regulation. Brokers were encouraged (or mandated by regulation) to have controls in place to monitor and, if required, cancel or stop clients trading. As clients had traditionally enjoyed direct access to the market via a broker, a system that was positioned between a trading system and the exchange needed to be a fast as possible to reduce the impact to a client’s trading strategy. Hence, FPGA technology was employed to great effect in a number of configurations; some banks built their own systems and several vendors built their own.

Fixnetix has enjoyed success using that model in Canada, where regulation has driven the need for a low latency risk solution for latency sensitive clients trade flows via a broker.

However, regulation alone has not proven to be the only driving factor for the use of FPGA in the finance area. For example, in Japan, the native exchange (TSE) utilises a complex and verbose protocol called arrowhead. In addition, the rules around erroneous trades and protocol discipline are onerous and for potential new entrants into that market it can be a daunting task to overcome.

Several brokers have solved this issue by offering FIX to arrowhead translation services to allow easy and ubiquitous trading, the downside being that such systems are very slow due to the amount of processing required to perform the translation into arrowhead and even more so in generating FIX compliant messages in the return path; this requires Persistence (storage of incoming FIX tags for later use) and Enrichment (calculation of values not available in arrowhead message such as Average Price).

What did Fixnetix do?

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Altera Stratix® V GX/GS PCIe Board with Dual QSFP+

BittWare's S5-PCIe (S5PE) is a PCIe x8 card based on the high-bandwidth, power-efficient Altera Stratix V GX or GS FPGA. 

For more information please contact Sarsen Technology on 01672 511166, or send us an email with your enquiry.

Altera Ships 20nm Arria 10 SoCs

Author - Laura

Altera has confirmed its leadership position in SoC FPGA products by shipping its second-generation SoC family. Arria® 10 SoCs are the industry’s only programmable devices that combine ARM® processors with a 20 nm FPGA fabric.

Embedded developers have a clear migration path with Altera for enhancing their next-generation systems. Arria 10 SoCs are fully software compatible with Altera’s previous 28 nm SoC product family allowing seamless software migration between generations. Arria 10 SoCs provide up to 50% higher performance and up to 4% lower power than the previous generation.

Altera SoC FPGAs enable smarter embedded systems by enabling single-chip product differentiation in both hardware and software. Combining ARM processors with FPGA fabric provides greater system value through reductions in power, costs and board space.

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Jeff Milrod, President and CEO of BittWare, says, "Altera’s Arria 10 is a true game changer. Native floating-point engines on these devices give system designers access to massive floating-point resources with tremendous ease-of-use and power efficiency in an FPGA. Classic signal processing applications can now interface analog signals directly to Arria 10 and process them there in floating point. For HPC and acceleration applications, FPGA algorithms no longer need to be ported to fixed point, nor do they need to be inefficiently implemented in fixed-point emulation of floating point. The Arria 10's native floating point provides more than 40 GFLOPS/W with a higher Fmax, while using only one-third of the logic resources. It is easier to use, lower power, faster, and less resource-intensive than any other alternative previously available.”

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For more information please contact Sarsen Technology - CONTACT US

FPGAs - Right For Your Application?

Simply put, a field-programmable gate array (FPGA) is an integrated circuit that can be programmed after manufacturing.

In 1985 Xilinx co-founders Ross Freeman and Bernard Vonderschmitt invented the first commercially viable FPGA. Two decades later, Freeman was entered into the National Inventors Hall of Fame for his invention.

FPGAs allow designers to adapt or completely change their designs very late in the production cycle– even after the end system has been manufactured and deployed in the field. You can configure an FPGA to be as simple or as complex as you require, but an FPGA does nothing by itself. FPGAs store their configuration in RAM, meaning that once they the power is switched off they lose their configuration. They must be configured every time power is applied.


To get started. the designer needs to create a bit file for the FPGA. Once it's loaded the FPGA will behave like the digital circuit you designed. FPGAs have large resources of logic gates and RAM blocks to implement complex digital programs. Similar to a PLD, but whereas PLDs are generally limited to hundreds of gates, FPGAs support thousands of gates. Thanks to their programmable nature, FPGAs are an ideal fit for many different markets.

_____________________________________________________________________________________________________

Extreme Engineering (X-ES) has designed and manufactured a line of high-performance FPGA processing modules in industry-standard XMC and 3U VPX form factors. These rugged, configurable modules include features such as FMC sites and daughter cards to simplify I/O compatibility for many different applications.

X-ES also has extensive experience integrating FPGAs with Intel® and Freescale-based SBC and I/O platforms into a wide range of customer-specific and SecureCOTS designs. With the combination of superior signal processing capabilities as well as high speed A/D and D/A conversion, these modules are ideal solutions for high-end RF signal acquisition, SDR, and DSP requirements.

Check out the FPGA Development Kit (FDK) whitepaper from X-ES for an in-depth review of how to integrate their FPGA capabilities into your application.

Extreme Engineering Solutions

Sarsen Introduces Impulse Accelerated Technologies to the Product Line

Author - Laura

We are very excited to annouce that Impulse Accelerated Technologies has appointed Sarsen Technology Ltd as its FPGA Tools and Design Services distributor in the UK and Ireland.

Founded in 2002, Impulse Accelerated Technologies is a Washington State based company who specialise in high performance and high reliability solutions which accelerate compute bound software modules by offloading them to FPGA. Having been in the business for over a decade Impulse offers sophisticated tools that work with Altera FPGA-based boards from BittWare, as well as Xilinx-based FPGA modules from Extreme Engineering and DAVE Embedded Systems (and other well known manufacturers!)

About Impulse C

Impulse C is one of the most widely used software to FPGA hardware optimizing compilers. It has been used in over 2,000 designs by clients as diverse as NASA, Sony and Wall Street Banks. Impulse CoDeveloper is compatible with > 90% of FPGAs, and available processor cores. Impulse CoDeveloper also produces synthesizable VHDL or Verilog compatible with many other tools.


Impulse C enables developers to rapidly prototype offloading CPU bound applications by moving them to multiple streaming processes running in FPGA hardware and software.

C and VHDL can be combined in heterogeneous programming. Impulse C even outputs IEEE compliant VHDL to simulators from Mentor and Aldec.

Impulse also offers board interface packages which link to memory, I/O, processors and other hardware features from C. 


The new relationship is going to allow us to support customers with complete FPGA-based solutions in the financial trading, telecommunications infrastructure, power generation and Mil/Aero markets, providing not only hardware and software, but also training and support going forward.

Impulse has helped over 500 teams improve their application by refactoring and recompiling it to run faster, smaller or at lower power. For more information about the new relationship and how it could benefit your FPGA-based application please contact Sarsen Technology on +44 1672 511166, or email us - info@sarsen.net

Altera SDK for OpenCL Recognised at the 2014 Elektra Awards

Author - Laura

The Altera SDK for OpenCL has been selected by Electronics Weekly as its design tool of the year at the annual Elektra European Electronics Industry Awards gala in London. This award is the latest in a series of recognitions the Altera SDK for OpenCL has received since its release in 2012. 

Altera offers the industry’s only OpenCL-conformant solution in today's market that allows software programmers to easily implement OpenCL applications on FPGA accelerators.

Founded by Electronics Weekly in 2003, the Elektra European Electronics Industry Awards are the most prestigious product, technology and business awards in Europe, recognising the achievements of individuals and companies in the electronics industry. A panel of independent industry experts and representatives from Electronics Weekly selected the Altera SDK for OpenCL as the winner in its "Design Tools and Development Software” category.

Read Full Press Release 
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BittWare’s OpenCL Developer’s Bundle provides the tools necessary to begin developing applications for the Altera Stratix V using OpenCL. OpenCL dramatically simplifies FPGA development by enabling designers to code their systems and algorithms in a high-level C-based framework, directly generating FPGA programming files from a pure software development flow. 

The OpenCL Developer’s Bundle includes BittWare’s S5-PCIe-HQ (S5PH-Q) half-length PCIe board, the BittWorks II system development software, the Altera Quartus II software, and the Altera SDK for OpenCL. This development bundle gives developers access to the latest generation of high-performance FPGAs on a validated COTS PCI Express board, while also significantly reducing their time-to-market by using OpenCL to develop their application.

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About the Altera SDK
The Altera SDK for OpenCL allows programmers to develop algorithms with the OpenCL language and harness the performance and power efficiencies of FPGAs. The Altera SDK for OpenCL includes a rapid prototyping design flow that allows OpenCL kernel code to be emulated, debugged, optimized, profiled and re-compiled to a hardware implementation in minutes. The re-compiled kernels can be tested and run on an FPGA immediately, saving programmers weeks of development time. 

BittWare Currently Exhibiting at MILCOM 2014

Author: Laura Biddiscombe

Event: MILCOM 2014 - Find out more
Location: Baltimore Convention Center - Baltimore, MD
Date: October 06. 2014 - October 08. 2014

It's not too late to catch BittWare in Baltimore, MD, at the 33rd MILCOM event.
Attracting decision-makers from government, military, academia, and industry, MILCOM gathers military and government communications subject matter experts from around the globe to conduct in-depth discussions about the latest in technology advancements. This event is an ideal forum for industry to demonstrate the application of these technologies and to promote products and services that provide reliable solutions to today’s mission-critical challenges. Hundreds of technologies and solutions are being demonstrated right now.

BittWare are currently showcasing a host of their Altera FPGA-based hardware, including:

The Terabox - Integrated FPGA PCIe Platform

• 20 TeraFLOPS processing: 16x Altera Stratix V GX/GS FPGAs
• 1.28 Terabits/sec I/O
• 6.5 Terabits/sec memory bandwidth
• 4U or 5U Rackmount PCIe system (server, industrial, or expansion)

and the Channelizer – Integrated FPGA 6U VPX Platform

• 19” 2U rackmount enclosure
• 1-slot backplane
• BittWare Stratix V FPGA-based 6U VPX board
• 4-channel, up to 5 GSPS, 8-bit ADC
• 2-channel, 5.6 GSPS, 14-bit DAC
• 6U VPX rear transition module for access to VPX I/O

Join BittWare on Booth #419 at MILCOM until October 8 in Baltimore...

BittWare's Brand New PCIe Card Based on the Altera Arria® V FPGA

Author - Laura Biddiscombe

BittWare’s A5-PCIe-L (A5PL) is a low-profile PCIe x8 card based on the Altera Arria V GZ FPGA.

Up to 8 GBytes of on-board memory includes DDR3, QDRII/II+, or RLDRAM3. Two front-panel QSFP+ cages allow two 40GigE or eight 10GigE interfaces. The A5PL also features a Board Management Controller (BMC) for advanced system monitoring, which greatly simplifies platform management. All of these features combine to make the A5PL a versatile and efficient solution for network processing, security, broadcast, and signals intelligence applications.

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CLICK TO VIEW DATASHEET (PDF)

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BittWare offers complete software support for the A5PL with its BittWorks II software tools and FPGA Development Kit. Designed to make developing and debugging applications for BittWare’s boards easy and efficient, the software provides a collection of libraries and applications and FPGA components that provide preconfigured physical interfaces, infrastructure, and examples, drastically cutting development time and easily integrating into existing FPGA development environments.

Working example projects are available for each board which illustrate how to move data between the board’s different interfaces. Supported interfaces include DDR3, DDR2, QDR2/+, PCIe, 10GigE, LVDS, SerDes, and Double Data Rate I/O. All example projects are available on BittWare’s Developer Site.

For more information please contact  Sarsen Technology on +44 1672 511166, or visit www.sarsen.net.

BittWare Introduces Brand New Arria 10 Family of FPGA Boards

Author - Laura Biddiscombe

Arria® FPGAs and SoCs from Altera deliver optimal performance, power, and cost efficiency in the midrange.

Built on 20 nm process technology, the Arria 10 FPGAs feature industry-leading programmable logic that integrates a rich feature set of embedded peripherals, embedded high-speed transceivers, hard memory controllers, and protocol IP controllers. In addition, Arria 10 FPGAs and SoCs are the industry’s first FPGA to integrate hardened floating-point (IEEE 754-compliant) DSP blocks that deliver breakthrough floating-point performance of up to 1.5 TFLOPS. Arria 10 SoCs are also the industry’s only 20nm FPGA to integrate a dual-core ARM® Cortex™-A9 MPCore™ hard processor system (HPS).

The brand new A10 board family from BittWare leverages the Arria 10 FPGAs exciting capabilities to build solid platforms in a variety of formats that support a wide range of challenging applications, such as network processing & security, compute & storage, instrumentation, test & measurement, broadcast, medical imaging, wireless infrastructure, and signals intelligence.

The A10 board family features flexible memory configurations, sophisticated clocking and timing options, QSFP28 cages that support 100Gbps (including 100GigE) optical transceivers, FPGA Mezzanine Card (FMC), and support for the network-enabled Altera® SDK for OpenCL™.

BittWare’s Arria 10 GX-based boards will begin shipping in Q4 2014. Arria 10 GT and SoC versions will be available in Q1 2015. Contact Sarsen Technology for pricing and details.

BittWare partners with Tamba Networks to provide ethernet MAC+PCS IP cores

BittWare, the provider of Altera-based FPGA COTS boards, has entered into a Value-Added Reseller (VAR) agreement with Tamba Networks, a developer of low-latency, high-speed Intellectual Property (IP) cores for networking and financial applications.

The Tamba Networks 1 to 400 Gigabit Universal Ethernet IP Core is a low latency and gate count solution which enables a 10 GigE "FIFO+MAC+PCS" of approximately 25 ns in an Altera Stratix V FPGA. This decreases the round-trip delay wire-to-wire. By narrowing their focus to the ethernet MAC and PCS - designing their own soft PCS core as opposed to the typical solution which uses the hard PCS core - Tamba Networks has optimised the design of both, bringing an extremely efficient solution to market and saving many nanoseconds of latency in the process.

“Many of our customers are looking for the lowest possible latency,” stated Ron Huizen, Vice President of Systems & Solutions at BittWare. “Therefore, we are always seeking out industry-leading technology that can help. Tamba’s MAC+PCS IP cores enable us to provide our customers with unprecedented wire-to-application ethernet latency.”

The Tamba Networks IP cores are available today on all of BittWare’s PCIe-based Altera Stratix V family of boards which include the following:
S5PE-DS Dual Altera Stratix V GX/GS PCIe Board with Quad QSFP+, DDR3, QDRII+, and RLDRAM3
S5PH-Q Altera Stratix V GX/GS Half-Length PCIe Board with Dual QSFP+/SFP+, DDR3, and QDRII+
S5PE-F Altera Stratix V GX/GS PCI Board with VITA 57 FMC Site
S5PE Altera Stratix V GX/GS PCI Board with Dual QSFP+

For more information please contact Sarsen Technology on +44 1672 511166 or email the team - info@sarsen.net

BittWare's 6U VPX Channelizer System Receives Primetime Choices Award

BittWare's 6U VPX Channelizer System is a serious bit of kit.

Featuring the powerful BittWare S5-6U-VPX (S56X) FPGA COTS board and with complete software support, the system is supplied tested and configured meaning the development time is seriously reduced - perfect for time-critical applications.
The system functions as a complete development and testing platform, ideally suited to a wide variety of applications, including satellite communications, radar, and electronic warfare.

You might have seen the 6U VPX Channelizer System on the web recently - it has been all over the news after it was chosen as a Primetime Choices product by the editors of VITA Technologies.

A Word from BittWare
“We are very pleased that VITA Technologies has recognized BittWare’s Channelizer System as a Primetime Choice Product,” stated Darren Taylor, BittWare Senior Vice President of Worldwide Sales & Marketing. “BittWare’s goal is to make life easier for our customers. Our Channelizer System does just that, giving our customers access to two Altera Stratix V FPGAs, an ARM Corex-A8 control processor, ADC, DAC, and a 6U VPX rear transition module for access to VPX I/O. All of this is fully integrated with superior software tools for a very seamless design process.”

Lets Get Technical
The single slot 2U VPX system features BittWare’s S5-6U-VPX (S56X) FPGA COTS board, which utilises high-density Altera Stratix V GX or GS FPGAs and two VITA 57 FMCs (FPGA Mezzanine Cards) with direct data connections to the on-board FPGAs.

An ARM Cortex-A8 handles the control plane, and an S56X rear transition module is included to provide rear panel I/O access, including 8 QSFP connectors for high-speed serial access, along with SFP, PCIe, GigE, SATA, JTAG, and LVDS.

With complete software support including BittWare’s ATLANTiS FrameWork, which enables reconfigurable data routing, the development system allows users to design and debug in a flexible environment. Hardware-in-the-loop support for Simulink provides an additional layer of flexibility, allowing rapid control prototyping and other real-time testing.

How Do I Get One of Those??
The 6U VPX Channelizer System (VRDP-CH) is available now. For more information please contact the Sarsen Technology team on +44 1672 511166, or send us an email - info@sarsen.net