Showing posts with label 28-nm. Show all posts
Showing posts with label 28-nm. Show all posts

Tuesday, 8 February 2011

Altera's 28-nm Variable-Precision DSP Block Architecture Wins the 2011 DesignVision Award


San Jose, Calif., February 2, 2011Altera Corporation (NASDAQ: ALTR) today announced that its variable-precision digital signal processing (DSP) block architecture won the DesignCon 2011 DesignVision Award in the Semiconductor and IC category. Altera's variable-precision DSP block architecture was recognized by DesignVision Award judges for its ability to enable high-precision, high-performance digital signal processing in FPGAs that efficiently supports many different precision levels. This unique architecture is implemented within Altera's portfolio of 28-nm FPGAs to increase system performance, reduce power consumption and reduce architecture constraints for DSP algorithm designers. Altera was presented with the 2011 DesignVision Award at a ceremony held at the Santa Clara Convention Center during DesignCon 2011.

Altera developed the industry's first variable-precision DSP block architecture to meet the industry's demands for higher precision signal processing. This innovative architecture allows each DSP block in the FPGA to be configured at compile time to three 9x9, two 18x18 or a single 27x27 or 18x36 multiplier mode. Additional higher precision modes are available using multiple DSP blocks. This architecture supports, on a block-by-block basis, various precisions per block, ranging from low resolution fixed point video up to single-precision floating point within a single DSP block, and even double-precision floating point with minimal external logic. To learn more about Altera's variable-precision DSP block architecture, or to view a white paper or webcast on the architecture, visit www.altera.com/dsp-variable-precision.

Wednesday, 16 June 2010

Re-inventing the DSP Block - Altera Changes the Game


FPGA & Programmable Logic Journal has a feature on Altera's complete re-design of the DSP block for their upcoming 28-nm Stratix-V FPGA line: Re-inventing the DSP Block

Tuesday, 20 April 2010

Altera announces next-generation 28-nm Stratix V FPGA family



Altera today announced its next-generation 28-nm Stratix V FPGA family, the industry's highest bandwidth FPGA. Offering up to 1.6 Tbps of serial switching capability, Stratix V FPGAs leverage a myriad of new technologies and a leading-edge 28-nm process to reduce the cost and power of high-bandwidth applications.

Manufactured on TSMC's 28-nm High-Performance (HP) process, the Stratix V FPGA family provides up to 1.1 million logic elements (LEs), 53-Mbits embedded memory, 3,680 18x18 multipliers and integrated transceivers operating up to an industry-leading 28 Gbps. The devices also incorporate the industry's highest level of application-targeted hard intellectual property (IP) for increased system integration and performance without the cost and power penalty. The family includes four variants that address a broad range of applications in the wireless/wireline communications, military, broadcast, computer and storage, test and medical markets.

These variants include:

Stratix V GT FPGA - Industry's only FPGA with integrated 28-Gbps transceivers targeting 100G systems and beyond

Stratix V GX FPGA - Supports a wide range of applications with 600-Mbps to 12.5-Gbps transceivers

Stratix V GS FPGA - Optimised for high-performance digital signal processing (DSP) applications with 600-Mbps to 12.5-Gbps transceivers

Stratix V E FPGA - Highest density FPGA ideal for ASIC prototyping, emulation or high-performance computing applications

"The innovations we made in our fifth-generation Stratix family dramatically improve the density and I/O performance of our high-end devices, further strengthening the FPGAs' competitive position versus ASICs and ASSPs," said Vince Hu, vice president of product and corporate marketing at Altera Corporation. "Altera remains committed to solving the challenge of increasing bandwidth while staying within designer's cost and power requirements. From the core to the I/O, we touched all aspects of Stratix V FPGAs to ensure they deliver the highest level of performance, density and integration."

An array of white papers, videos and technical documentation highlighting how Stratix V FPGAs help solve today's most demanding design challenges are available for viewing on Altera's website. To access these materials and a variety of other information on Stratix V FPGAs, visit Altera Stratix V Documentation