Tuesday 27 March 2018

BittWare Announces SmartNIC Shell for Building FPGA-powered 100G NICs

SmartNIC Shell Supports DPDK, Xilinx SDNet, P4 Programming, User Customisations, and Timestamping

BittWare has announced SmartNIC Shell, a suite of IP modules for building 100G network interface controllers (NICs) using FPGAs for hardware packet processing.



Users can fully customise Shell components, including a Match/Action pipeline with features including Xilinx SDNet support and the P4 network programming language. For host application interaction the Arkville DPDK IP is integrated for kernel bypass. SmartNIC Shell allows teams to avoid the time-consuming process of building core NIC functions into an FPGA, allowing them to focus resources on their own application.

Read more - Full Press Release

“We built the SmartNIC Shell because we noticed that many of our customers spend half their development time creating a networking shell,” said Craig Lund, Vice-President Network Products, BittWare. “All of that development time should be going into their own product’s unique value instead.”


SmartNIC Shell Top Features

Quickly Build 100G NICs Focus your attention on your unique application, instead of re-inventing a NIC.
Match/Action Pipeline Standardised kernel bypass for host interaction over PCIe. SmartNIC Shell provides DPDK offload to interact with host applications.
TimeServo Timestamping Precision time stamping including 1588-compatible clock adjustments. Uses TimeServo IP from Atomic Rules
Xilinx UltraScale+ FPGA Large, powerful FPGAs with ample room for user IP. Selection of BittWare boards including traditional low-profile NIC size (XUPPL4) to 3/4-length boards with additional logic and memory options (XUPP3R).

For more information please contact the Sarsen FPGA team on +44 1672 511166 or send us an email - info@sarsen.net

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